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Video: PSL and SVA for SPICE – Yes, Assertion Based Verification (ABV) for Analog Behavior!

Comments(0)Filed under: PSL, SVA, DVcon, ABV, assertions, Joe Hupcey III, video, Virtuoso, SPICE, Don O'Riordan

In this video, Senior Architect in Virtuoso R&D Don O'Riordan shares some background information on his DVCon 2012 paper, "PSL/SVA Assertions In SPICE."  Wait, aren't Property Specification Language (PSL) and SystemVerilog Assertions (SVA) digital assertion-based verification (ABV) languages?  Please let Don explain ...

(Click here if the embedded video doesn't play.)

Joe Hupcey III
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Link to the DVCon 2012 proceedings entry for this paper:

Full paper citation:
1P.2 PSL/SVA Assertions In Spice
Speaker: Donald J. O'Riordan - Cadence Design Systems, Inc.
Authors: Donald J. O'Riordan - Cadence Design Systems, Inc.
Prabal K. Bhattacharya - Cadence Design Systems, Inc.


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