The number of licensees for ARM's Cortex-A15 CPU core is growing rapidly, particularly for mobile computing applications. Customers tell us that's because it provides multiprocessor support and hardware based coherency while consuming only a small amount of power. In our experience the majority of A15 designs are also adopting the new ACE protocol due to their need for a fast and reliable coherency scheme.
To help potential A15 designers learn more about ACE, ARM and Cadence partnered to develop a video about ACE and ACE verification. It's only about 10 minutes long -- I encourage you to view it. In addition you can see my previous blog discussing the need for hardware based coherency.
While ACE compliance is challenging to verify, the even bigger verification challenge is ensuring the design is actually coherent. This is where Cadence's complete ACE verification solution provides superior value. We are seeing that nearly all ACE designs also incorporate fabrics such as ARM's CCI-400 and/or NIC-400. For this type of design it's necessary to have three verification tools all working in conjunction:
Only by having the ACE VIP, Interconnect Monitor and Scoreboard working together can you be assured of achieving end-to-end design coherency. Cadence's solution addresses all the common ACE/coherency verification challenges. For example it will:
- Create the necessary scenarios needed to mimic processor and memory behavior including snooping operations
- Ensure data coherency (i.e. ensuring that only one copy of any data is valid)
- Ensure that all simultaneous write/snoop combinations are managed correctly
- Ensure no scenarios create deadlocks
You can open the video below or click here to view:
For more information about ACE verification we encourage you to contact your Cadence field representative. You can also view our AMBA VIP information page. You'll find a datasheet there as well.