Home > Community > Blogs > Functional Verification > 1st anniversary of the team verify blog
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Functional Verification blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

1st Anniversary of the Team Verify Blog!

Comments(1)Filed under: Functional Verification, Low Power, Formal Analysis, SoC, Coverage-Driven Verification, metric driven verification (MDV), workshops, Kit, ABV, MDV, Twitter, IEV, formal, methodology, vPlan, IFV, Blog, metric-driven verification, NextOp, assertion synthesis, Zocalo, SoC Connectivity, assertions, ABVIP, simulation, formal verification, Chris Komar, Oski Technology, assertion-based verification

Verifiers rejoice: today is the 1st anniversary of the launch of this blog!!!  To commemorate the occasion, allow us to highlight the top 5 posts (out of 25 total!) from the past year.  Without further adieu, in ascending order of web hits and comments received ...

#5 - "Everything Assertion Based" -- Assertion-Based Verification (ABV) Comes of Age for Complete Block-Level Verification
This post dares to claim that for blocks of less than 1 million flops, ABV now provides a complete verification flow -- test generation, checks, coverage, the works! -- using assertions and multi-engine tools like Incisive Enterprise Verifier (IEV).   In general, this is a great post to share with peers and managers whose knowledge of Formal and ABV is way out of date.

#4 -- The Benefits of Metric-Driven Formal Analysis and Verification (MDV + ABV + IEV)
This post introduces how results from "pure Formal" can be tied into a traditional simulation-based metric-driven verification flow on an "apples-to-apples" basis.  Finally, this new approach gives Formal users a means to address the common frustration of communicating their intentions and progress to simulation-oriented managers.

#3 - Video: Optimizing Area and Power Using Formal Methods
The irony of this post making the top 5 is that it's not about Formal verification per-se, but applying  Formal engines in a novel way to reduce the area/die size of a chip while simultaneously reducing power consumption (i.e. Formal saving money in a truly measurable way).  The video and/or the associated DVCon 2011 paper is great food for thought.

#2 - The Roll of Coverage In Formal Verification
OK, this is technically not one post, but it's one in an excellent multi-part series (Part 1, 2, 2a, and 3) on how the familiar metric of "coverage" can be exploited by Formal and mixed-engine formal and simulation technologies to dramatically improve the confidence and speed in reaching coverage closure.

[[[ drum roll, please ...]]]

#1 - Verification Goldmine: 50 User Papers on Formal, Multi-Engine, and Assertion-Based Verification (ABV)
Team Verify has been blessed with a generous and prolific community of users who have taken the time to share their experiences in pure formal verification, multi-engine mixes of formal and simulation, general topics on Assertion-Based Verification, and creative new applications of these technologies such as SoC Connectivity verification.  We are certain that somewhere in this goldmine is a paper from a company in your industry, vertical, or problem space that will give you a running start in your ABV efforts.

Honorable mentions go to:
* Videos from NextOp, Zocalo, and Oski Technology
In addition to highlighting their respective technical & service innovations, these interviews can give you a real sense of the integrity and passion of these companies' leadership teams.

* Tech Tip: Dramatically Improve Throughput With "Assertion Distributor"
Undoubtedly this one tech tip has saved customers countless hours and increased their verification throughput dramatically.

Complementing this blog are several more online resources:
* The Cadence Functional Verification forums

* Xuropa online lab introducing the basics of Incisive Formal Verifier (IFV) via a UART sub-module of the SoC Verification Kit.  Go to http://www.xuropa.com/cadence and click on the "Formal Verification of the UART Lab" icon.  (Requires free Xuropa registration.)

* Last, but not least: support.cadence.com - the font of all Incisive platform online help, the complete SoC Kit with Formal and multi-engine workshops, and plenty of handy FAQs as well

Do you have a Formal or dual engine Formal and simulation-related product, web site, blog, utility, plug-in, shareware, or really cool Formal or ABV challenge you would like to share or promote?  If so, please contact us and we will work with you to introduce and discuss it via this blog -- and on Twitter too (follow us: @teamverify).

Thank you for reading or subscribing to our blog, and sharing your insights via your comments and other contributed posts.  We look forward to serving you in the coming years!

Happy Verifying!

Team Verify

On Twitter: http://twitter.com/teamverify, @teamverify



By Anu Bohra on April 11, 2011
Congratulation TeamVerify on completing one year! This is an excellent consolidation and summary of the blogs ; just in case I have missed any!
Keep up the good work.

Leave a Comment

E-mail (will not be published)
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.