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Video: DVCon 2011 Update From NextOp CEO Yunshan Zhu

By Joseph Hupcey III on March 21, 2011Comments(0)Filed under: Functional Verification, Formal Analysis, metric driven verification (MDV), SVA, DVcon, IES-XL, ABV, MDV, IEV, formal, uvm, IFV, Palladium XP, Cadence Connections, NextOp, assertion synthesis, formal verification, Zhu

At DVCon 2011 I had the opportunity to catch-up with NextOp's CEO Yunshan Zhu, where in this video he shares some anecdotes about the BugScope's performance in real world customer environments (including accelerating assertions in Palladium with -0- (zero, zip, zilch, nada) hardware overhead!), and how their technical success is to translating to the bottom-line.

If the video fails to play, click here.

Note: we had to shoot this video before the expo floor opened since this year the ballroom housing the DVCon expo was crammed with more booths and attendees than ever before.  So in case you were wondering, if booth traffic is any guide NextOp appeared to be as hot as ever since their booth was always busy:

And their joint poster session with Broadcom was a draw too:

 

Happy Assertion Synthesizing!

Joe Hupcey III

On Twitter: @jhupcey --  http://twitter.com/jhupcey

 

Reference Links

NextOp Software's home page: http://www.nextopsoftware.com/

My original video interview with Yunshan last October

Richard Goering "Industry Insights" interview: "Q&A: NextOp CEO Describes Assertion Synthesis"

 

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