Home > Community > Blogs > Functional Verification > video distinguished engineer alok jain on formal amp assertion based verification abv today and tomorrow
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Functional Verification blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Video: Distinguished Engineer Alok Jain on Formal and Assertion-Based Verification (ABV), Today and Tomorrow

Comments(2)Filed under: Functional Verification, Formal Analysis, CDV, Coverage-Driven Verification, metric driven verification (MDV), verification strategy, Incisive Enterprise Simulator (IES), verification, ABV, MDV, IEV, formal, IFV, EDA360, IP, Alok Jain, assertions, ABVIP

Kicking off 2011, my colleague Alok Jain -- a Distinguished Engineer at Cadence who directs the company's R&D efforts in formal verification -- spoke with Industry Insights columnist Richard Goering.  In a wide ranging interview they discussed formal verification usage trends, benefits, roadblocks, appropriate coverage metrics, and the growing alignment of simulation and formal to speed Silicon Realization.

In this video Alok goes a few steps further and declares things like, "the term ‘hybrid' has become obsolete"; and goes on to describe how Formal can drastically simplify the jobs of "Integrators" driving SoC Realization.  Bottom-line: if you haven't read the book, you can see the action-packed movie now!

If the video doesn't play, click here.

Question: are you seeing the similar trends in designer, expert, and mixed formal and simulation usage in your company/clients?   Please share your thoughts below, or contact me offline.

Happy bug hunting!

Joe Hupcey III

Twitter: @jhupcey, http://twitter.com/jhupcey


By AB777 on January 30, 2011
Excellent vedio on formal verification insights. Is there a way that this can be shared on other EDA blogging websites?
Another point I wanted to add is that there are "still" companies  especially startup semicon/design industries which have not started using Formal verification. It is in those companies , Formal should reach out to. For them insights and experiences how "only formal" can solve the designer's problem of verification will give a boost to formal.
-- Anu Bohra

By jvh3 on January 31, 2011
Thanks for your comment, Anu!

This video is openly posted on YouTube, and thus can be embedded in any website.  Specifically, you can click through to see this video's page / go to youtube.com/jhupcey and select this video, then click "Share" to see the code.

Finally, great point on startups and Formal.  In particular, I think what a lot of companies don't realize -- both startups and large companies -- is how you can use Formal to expedite design bring up.  Hence, in a startup's case, they could benefit from getting "a proof of concept" up and running to build credibility with investors, early adopters, etc. much sooner.

Thanks again for your comments!

Leave a Comment

E-mail (will not be published)
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.