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DAC Cabbie Taught Me All I Need to Know About Verification

Comments(0)Filed under: DAC, OVM, SystemVerilog, IES, Register Package, Incisive, AMIQ, ABV, MDV, Twitter, VMM, uvm, Funcional Verification, Accellera VIP TSC, EDA360

Confidence from competence.  Measurement through metrics.  Sell without selling. These are the pearls I learned from my cab driver on the way home from DAC. Aside from the core truths they convey, they clearly define the top three verification items I saw at 47th DAC in Anaheim this year.

Topping my list is the surging interest in OVM as it matriculates into the Accellera UVM.  The OVM/UVM booth at DAC picked up nearly 800 leads!  Despite relatively flat attendance, this is up roughly 3x over last year and is a testimony both to the success OVM has enjoyed and the recognition that UVM is the future of testbench verification because it is based on OVM 2.1.1. With all this hype, the cabbie's wisdom is seen in the customer papers presented in the booth because those papers exude competence and measurement that sell the methodology without selling it.  During the show I tweeted from @SeeAdamRun a whole series of detailed quotes from these presentations and from the Accellera breakfast, but I would like to cite a few key points here:

  • OVM 2.1.1 is the last official OVM release.  This is a critical statement from both Cadence and Mentor acknowledging that UVM is a clear successor to OVM and that both companies are putting their methodology development resources into the UVM.  From the Cadence side in particular, this was underscored by the bold release of the UVM Reference Flow on UVM World.  This flow will make it much easier for new users to learn the UVM.  A day later, Amiq announced a UVM migration wizard for OVM users to augment the script shipped with the UVM 1.0 EA release.  With all of this momentum, the easy transition, and the limited resources we all have, the statement that OVM 2.1.1 is the last release is the only logical business conclusion.  Of course, Cadence will continue to support OVM users, but this clear, definitive statement is part of the cabbie's wisdom.  Stunningly, Synopsys announced a follow-on, albeit mostly a bug-update -- to VMM 1.2.  We invited Synopsys to join us in the OVM/UVM discussions in the booth but as @tomacadence tweeted, they declined the offer.  Let's see if Synopsys will comment here or on Tom Fitzpatrick's similar blog.
  • UVM World becomes the central source for all UVM information.  Content, including forums, contributions, and articles, are starting to flow into the site.  Most notably, the UVM 1.0 roadmap presentation from the Accellera breakfast is now posted on the site.  This presentation is written by the Accellera VIP TSC chairs and spells out the current status and roadmap for the UVM.
  • Customers drive credibility.  For me, the presentation that embodied this the most is the one Larry Ching from Boeing presented on success with the Cadence register package for the OVM.  One of the reasons he stated for selecting this package was multi-vendor support, a feature not found with the other packages.  This was coupled with a conversation with an engineer from Intel that resulted in the exchange of contact information, and embodied the EDA360 spirit that we saw through all of the presentations in the OVM/UVM booth.  Check this blog shortly and we'll let you know where to find the presentation PDFs.

If I had to point you to my top three verification partners, it would be Zocalo, Doulog, and Amiq (just to be cute and reverse the alphabetical order).  Each of these met my Cabbie's measurements of what it takes to succeed with the "install it and see for yourself" attitude.  In the case of Zocalo, I encourage you to call them a get a technologist-led Zazz demo to truly understand how it can help you find where to place your assertions, enable you to graphically construct them, and then measure their effectiveness. 

With Duolog, I would also strongly suggest an instructor led demo.  Their Socrates solution will help realize the technical reality of EDA360, because it enables you to capture the register, memory map, and more information about your SoC, and then statically verify that information before writing it into whatever format you need for verification.  Finally, Amiq continues to make the development of OVM and UVM easier and easier with their DVT solution and the features that plug into it.  Keep watching Amiq for more UVM announcements coming shortly!

Finally, I can't even begin to tell you how good it felt to be back at DAC in force.  With an active, vibrant Cadence booth and demos on the floor, Cadence Verification lived the cabbie's mantra.  We had verification customers presenting in both our theatre and the OVM booth, showing competance and confidence with our products. Our demos projected both productivity metrics as well as the management of verification metrics, and the verification leadership we exhibited through the various panels and standards efforts throughout DAC sell Cadence verification without selling.  With almost nineteen years at Cadence, I am very pleased with the what we have achieved through the technical prowess of hundreds of Cadence engineers.  Keep your eyes on us, we have a lot more in the pipeline!

I picked up three inspiring points from my cabbie at DAC which opened my eyes to three key verification observations.  What did you learn at DAC?

 =Adam Sheriblog


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