Home > Community > Blogs > Functional Verification > advanced option brings new features to specman e users
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Functional Verification blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Advanced Option Brings New Features to Specman/e Users

Comments(0)Filed under: Functional Verification, DAC, SystemVerilog, Incisive Enterprise Simulator (IES), e, Specman, IES-XL, specman elite, team specman, multi-core

Great news for Specmaniacs -- a new Specman Advanced Option is being announced at the Design Automation Conference (DAC) for Specman/e users. Three key functionalities in this Option will be:

  1. Multi-core Compilation - Close to Nx (N= # cores) speedup in compilation time.
  2. Re-Seed/Dynamic Load - Allow users to run a simulation and/or regression run until some pivot point, save the state, and start the test from this point using different seed or load another e test.
  3. Debug Compiled Code - User can debug their e code with the performance of compiled code.

More details about the option are described in an interactive interview that was recently conducted between Cadence's Team Specman and Srinivasan Venkataramanan of CVC Pvt. Ltd. You can read the interview in a blog on the CVC website.

Some background on CVC

CVC Pvt. Ltd. was founded by a team of functional verification experts who are well known in the verification domain by the VLSI engineering community in India, Asia, and worldwide.  They have co-authored 4 books on verification and they also engage with standardization committees to contribute and drive developments.  They serve as the link between these committees and the end users/engineers in the India and Asia regions.

Also, they have many years of testbench verification expertise using Specman/e solutions.  In short, they are expert Specmaniacs.  Thus, when the verification experts at CVC really got excited about the Specman Advanced Option, we felt really good.  We believe that other Specmaniacs will also love this new advanced e-based functionality.

Consequently, while you are DAC, don't forget to stop by the Cadence booth and meet some of the Team Specman members. Feel free to ping Mike Stellfox (Cadence verification guru), Joe Hupcey III, Adam Sherer or Tom Anderson at the Cadence booth 1334, Hall B. They would be happy to provide you more product details and/or roadmaps for Specman/e.

We look forward to seeing you next week at DAC, and don't forget to check out the Blog interview from CVC.

Kishore Karnane for Team Specman

Comments(0)

Leave a Comment


Name
E-mail (will not be published)
Comment
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.