Specman/e users in India were very excited to see the first two ClubT events hosted in Noida and Bengaluru, India on May 10th and May 13th respectively. Overall, there were nearly 125 Specman/e users who attended these two "highly interactive and technology rich" ClubTs.
Customers like TI, Samsung and others presented technical articles on how they've used Specman/e in their advanced verification environments. These papers naturally led to very interactive discussions among users, as well as the R&D and Marketing teams staffing the events. It was really great to see such an interactive dialog among all concerned.
Several customers also presented how they've used Specman/e in their advanced verification environments to address their most complex verification challenges. For example, Harsh Setia from Texas Instruments presented a highly interactive presentation on Intelligent Stimulus Driver for Cache Verification. The presentation highlighted creation of an intelligent stimuli driver using e that helped reduce the verification cycle-time of an extremely complex next generation unified cache by 30%. Here are some specific highlights:
- Mr. Setia presented that verification of cache is a challenging task due to high complexity and configurability involved. The coverage grid is huge and it is practically not possible to "think through" all the possible scenarios that can occur in the cache. Scenario creation is often tricky because of multiple data threads running concurrently and huge sequential depth.
- Debugging failures due to illegal scenarios are often time consuming. This makes the stimulus generation an important consideration for cache verification. The conventional approaches used for stimulus generation have a number of limitations such as less controllability, illegal scenario generation, high effort involved for new scenario creation, error prone, low re-usability, large test suites, high maintenance, repetitive tests, and large regressions. These limitations divert the focus of the verification engineer from verification to challenges in stimulus and scenario generation. This wastes a lot of time and effort and thereby increases the verification cycle and cost.
- The presentation highlighted how Mr. Setia created an intelligent stimulus driver in the e language that addressed the limitations of conventional approaches by seeking feedback from different behavioral models developed in e to help create an exhaustive set of cache scenarios to catch all possible bugs in a much shorter verification cycle time.
- Bottom-line: his approach of using e helped him find over 200 bugs and saved him 11 man months of verification effort. (WOW!!!)
Another presentation from Samsung was also widely appreciated by the audience. Samsung presented how Specman/e was use to address the "Challenges in verifying complicated SoC IP's". Highlights:
- Samsung's approach explained how to develop the Specman verification components and environment to support validation (GLS), and coding specific support for Multi-Value Logic (MVL).
- With this approach, verification components like an interface eVC can drive or respond with MVL Values as per the DUV interface requirements (Functional). Also, eVC monitors and checkers can monitor and check if there are any violations as per DUV specification.
- During GLS (validation) the same eVC can drive error scenarios to see timing violation impact on the DUV. Monitors and checkers will look and check for timing violations at the interface level according to configuration details.
- In the verification environment, the module eVC is coded in such way that It can check for sub-module level timing violations with the timing configuration details that it has. This methodology ensures that same environment and components used for verification can be reused to do validation (GLS).
- Overall, customers heard about new advanced verification techniques that were used by Samsung in their verification project. From the customer interactions, it was quite obvious that the attending customers were genuinely interested in learning how other customers have been using Specman/e for their most complex verification tasks.
Cadence R&D and Marketing also presented product roadmaps as well as new features and functionalities in the current product release. Several positive quotes were received by customers like the one from Balaji Veenu from Wipro. He came over and casually said "Specman/e is an awesome tool, I love it." He also added "it's great to see all these Specman users in India in the same room interacting with each other."
Overall, it was a great event in India and there's more to come in 2010. There was no question in anyone's mind after the session about the future of e. They all were very excited to hear about all the investment that Cadence is pouring into Specman/e and were looking forward to new "performance related" enhancements in the 2010 release....hint, hint..
Other locations for ClubT are:
June 4 Tokyo, Japan (delivered last week)
Week of Sept. 13 Several sites in North America - dates & locations pending
October Several sites in Europe - dates & locations pending
So, as you can see, 2010 will be a fun-filled year with ClubT events all over the globe. Keep visiting this site for future ClubT locations and dates.
Last but not least: of course members of Team Specman will be at DAC in Anaheim, CA starting Sunday June 13 at the EDAC forum, at the Cadence booth 1334, Hall B from June 14-16, or at the Embedded SoC Enablement Day on Thursday June 17. Ask for Tom Anderson or Joe Hupcey III for more details.
We look forward to seeing you at one of these events soon!
On Twitter: @teamspecman -- http://twitter.com/teamspecman