Team Verify would like to inform you about the final call for papers for FMCAD 2010 (Formal Methods in Computer-Aided Design), being held 20-23 October 2010 in Lugano, Switzerland.
This conference has traditionally focused on research on formal methods in academia and industry. However, this year the conference is expanding to bridge the gap between research and real world applications, supported by a whole new "industrial" track being added to the conference. Hence, this is a great opportunity to share your experiences and insights in the industrial use of formal analysis. Even better: the deadline has just been extended to May 12.
If you are not interested in publishing you might still consider attending. The program is very interesting and such giants in formal research as our own Ken McMilllan, amongst others, are giving tutorials.
See conference details at: http://fmcad10.iaik.tugraz.at/ (and check out the background info included below).
Of course, members of the Team Verify R&D group will be there -- we hope you will join us!
Final Call for Papers
International Conference on Formal Methods in Computer-Aided Design
20-23 October 2010
Abstract Submission: 5 May 2010
Paper Submission: 12 May 2010 (extended)
Author Notification: 7 July 2010
Final Version: 28 July 2010
Conference: 20-23 October 2010
FMCAD 2010 is the tenth in a series of conferences on the theory and application of formal methods in hardware and system design and verification. FMCAD provides a leading international forum to researchers and practitioners in academia and industry for presenting and discussing novel methods, technologies, theoretical results, and tools for formally reasoning about computing systems, as well as open challenges therein. This year, FMCAD is privileged to have Joseph Sifakis, Founder and Director of VERIMAG Laboratory, a Turing Award 2007 winner, to deliver its keynote address on Scientific Challenges and Work Directions in Embedded Systems Design. The tutorial speakers are Ken McMillan, a Paris Kanellakis Award winner, senior researcher at Cadence Berkeley Labs, Warren Hunt, Professor at University of Texas at Austin, Sumit Gulwani, a researcher at Microsoft Research, USA, and Jin Yang, a senior staff research engineer at Intel Strategic CAD Labs.
NEW: FMCAD 2010 has two tracks (but no parallel sessions): the research track and the industrial track.
Topics of interest:
Advancing industrial-strength technologies in Model Checking,Theorem Proving, Equivalence Checking, Abstraction and Refinement Techniques, Reduction and Abstraction Techniques, Compositional Methods, Decision Procedures, SMT solvers, Bit-Precise Reasoning, Word-Level Techniques, SAT- and BDD-based methods, Probabilistic Methods, and Combinations of Deductive Methods and Decision Procedures.
Applications of Formal Methods in Specification, Design and Verification
Topics relating to the application and applicability of Property-Based Verification, Equivalence Checking, Semi-formal Verification, Runtime Verification, Simulation and Test-case Generation, Coverage Analysis, Microcode Verification, Concurrent Systems, Timing Verification, and Formal Approaches to Performance and Power.
System-Level Design and Verification, especially for Embedded Systems, Software Verification, HW/SW Co-Design and Verification, Transaction-Level Verification. Modeling and Specification Languages, Model-Based Design, Verification-Based Testing, Design Derivation and Transformation, Correct-by-Construction Methods.
NEW: INDUSTRIAL TRACK
This track is dedicated to industry users of formal methods, including work on real industrial-scale designs being done in universities and research organizations. We invite such users to describe their experience with formal methods, including evaluations of commercial tools, case studies of industrial-scale applications, experience reports on novel and challenging applications, or methodologies for the incorporation of formal or semi-formal methods into the industrial design flow. Finally, we invite tool presentations, of industrial-strength commercial tools as well as novel academic tools that are not yet industrial strength, but address a real industrial need. Tool presentations should describe the capabilities or novel features of the tool, or an innovative algorithm, a new approach, or original application methodology.
FMCAD 2010 will feature also an exhibition with limited free-of-charge booth space for which academic novelty is not a requirement. Note that since space is limited, we will not be able to accept every request for a booth, and that preference will be given to requests by authors of accepted tool presentations. EDA vendors are especially encouraged to submit a tool presentation and/or to request booth space in order to demo their tools.
Submissions must be made electronically in PDF format via EasyChair. More details will be provided on the FMCAD web site. The proceedings are planned to be published by IEEE and ACM and will be available online in the ACM Digital Library and at IEEE Xplore.
Research Track Submissions
Two categories of research papers can be submitted: regular papers (8 pages) containing original research, and short papers (4 pages) describing emerging results and work-in-progress.
Industrial Track Submissions
Submitters to the industrial track will have the option of submitting a regular paper (8 pages), a short paper (4 pages), or a deck of up to 25 slides (for tool presentations: 4 pages or 15 slides). Both papers and slide submissions will be reviewed. Regular and short papers will appear in the proceedings as usual, while authors of accepted slide presentations will be invited to write a one page abstract for the proceedings.
For exhibition space, submission is not required and an email request to the industrial track chairs is sufficient. However, due to limited space we will not be able to accept every request. We therefore strongly advise those interested in exhibition space to submit a tool presentation, as we will give preference for booth space to authors of accepted tool presentations.
Regular and short papers must use the IEEE Transactions format on letter-size paper using a 10-point font (see
Research Track papers must contain original research that has not been previously published, nor concurrently submitted for publication. For both research and industry submissions, any partial overlap with a published or concurrently submitted paper must be clearly indicated. (For slide decks, use an extra slide to discuss overlaps; this slide may be excluded from the final presentation.) By submitting their work, the authors agree to present it at the conference if selected. Authors are strongly encouraged to provide adequate access to their experimental data for verification. A small number of accepted papers will be considered for a distinguished paper award.
Roderick Bloem<http://www.iaik.tugraz.at/bloem/>, Graz University of Technology, Austria Natasha
Sharygina<http://www.inf.usi.ch/faculty/sharygina/>, University of Lugano, Switzerland and CMU, USA
INDUSTRIAL TRACK CHAIRS
Wolfgang Ecker<http://eda.ei.tum.de/EDA/people/index_html/woe.html>, Infineon Germany
Cindy Eisner<http://www.research.ibm.com/people/e/eisner/>, IBM Haifa Research Laboratory, Israel
Helmut Veith<http://www.dbai.tuwien.ac.at/staff/veith/>, Vienna University of Technology, Austria
Tom Melham<http://www.comlab.ox.ac.uk/Tom.Melham/>, Oxford University Computing Laboratory, UK
Hana Chockler<http://domino.research.ibm.com/comm/research_people.nsf/pages/hanac.index.html>, IBM Haifa Research Laboratory, Israel
Jason Baumgartner, IBM, USA
Valeria Bertacco<http://www.eecs.umich.edu/~valeria/>, University of Michigan, USA Armin Biere<http://fmv.jku.at/biere/>, Johannes Kepler University, Austria Per Bjesse<http://www.perbjesse.com/>, Synopsys, Inc., USA Roderick Bloem<http://www.iaik.tugraz.at/bloem/>, Graz University of Technology, Austria Doron Bustan, Intel, Israel Gianpiero Cabodi<http://fmgroup.polito.it/cabodi/>, Politecnico di Torino, Italy Alessandro Cimatti<http://sra.itc.it/people/cimatti/>, IRST, Italy Koen Claessen<http://www.cs.chalmers.se/~koen/>, Chalmers University of Technology, Sweden Ganesh Gopalakrishnan<http://www.cs.utah.edu/~ganesh/>, University of Utah, USA Aarti Gupta<http://www.nec-labs.com/~agupta/>, NEC Labs, USA Ziyad Hanna<http://web.comlab.ox.ac.uk/ziyad.hanna/>, Jasper Design Automation, USA Alan Hu<http://www.cs.ubc.ca/~ajh/>, University of British Columbia, Canada Barbara Jobstmann<http://www-verimag.imag.fr/~jobstman/>, CNRS-Verimag, France Jie-Hong Roland Jiang<http://cc.ee.ntu.edu.tw/~jhjiang/>, National Taiwan University, Taiwan Vineet Kahlon<http://www.cs.utexas.edu/~kahlon/>, NEC Labs, USA Gerwin Klein<http://www.cse.unsw.edu.au/~kleing/>, NICTA, Australia Daniel Kroening<http://www.comlab.ox.ac.uk/people/daniel.kroening/>, Oxford University Computing Laboratory, UK Thomas Kropf<http://www-ti.informatik.uni-tuebingen.de/~kropf/>, University of Tübingen, Germany Marta Kwiatkowska<http://web.comlab.ox.ac.uk/marta.kwiatkowska/>, Oxford University Computing Laboratory, UK Oded Maler<http://www-verimag.imag.fr/~maler/>, CNRS-Verimag, France Panagiotis Manolios<http://www.ccs.neu.edu/home/pete/>, Northeastern University, USA
Ken McMillan<http://www.kenmcmil.com/>, Cadence Berkeley Labs, USA
Tom Melham<http://www.comlab.ox.ac.uk/Tom.Melham/>, Oxford University Computing Laboratory, UK John O'Leary, Intel, USA Lee Pike<http://www.cs.indiana.edu/~lepike/>, Galois, Inc., USA Marc Pouzet<http://www.lri.fr/~pouzet/>, University of Paris-Sud, France Julien Schmaltz<http://www.cs.ru.nl/~julien/>, Open University of The Netherlands, Netherlands Natarajan Shankar<http://www.csl.sri.com/~shankar/>, Computer Science Laboratory, SRI, USA Natasha Sharygina<http://www.inf.usi.ch/faculty/sharygina/>, University of Lugano, Switzerland and CMU, USA Satnam Singh<http://research.microsoft.com/en-us/people/satnams/>, Microsoft Research Anna Slobodova, Centaur, USA Sofiene Tahar<http://www.ece.concordia.ca/~tahar/>, Concordia University, Canada Helmut Veith<http://www.dbai.tuwien.ac.at/staff/veith/>, Vienna University of Technology, Austria Karen Yorav<http://domino.research.ibm.com/comm/research_people.nsf/pages/yorav.index.html>, IBM Research, Israel
Peter Jensen, SyoSil Aps, Denmark
Pranav Ashar, RealIntent, USA
Lyes Benalycherif, ST Ericsson, France
Per Bjesse<http://www.perbjesse.com/>, Synopsys, Inc., USA Holger Busch, Infineon Joachim Gerlach<http://www.fh-albsig.de/~se/personen/gerlach.htm>, Albstadt-Sigmaringen University, Germany Ziyad Hanna<http://web.comlab.ox.ac.uk/ziyad.hanna/>, Jasper Design Automation, USA Christian Jacobi, IBM, Germany Andreas Kuehlmann<http://www.eecs.berkeley.edu/~kuehl/>, Cadence Berkeley Labs, USA Ajeetha Kumari, CVC Pvt Ltd, India Viresh Paruthi, IBM, USA, Axel Scherer, Cadence Berkeley Labs, USA, Michael Siegel, OneSpin Solutions, Germany
Mariagiovanna Sami<http://www.elet.polimi.it/people/sami>, Politecnico di Milano, Italy and University of Lugano, Switzerland Umberto Bondi<http://www.inf.usi.ch/personal-info?id=456>, University of Lugano, Switzerland Daniela Dimitrova<http://www.inf.usi.ch/personal-info?id=1230>, University of Lugano, Switzerland Francesco Regazzoni<http://www.alari.ch/~regaz/>, University of Lugano, Switzerland and UCL Louvaine-la-Neuve, Belgium
Prof. Natasha Sharygina
Formal Verification and Security Group
Informatics Department, University of Lugano http://www.inf.unisi.ch/faculty/sharygina