Home > Community > Blogs > Functional Verification > fsm mnemonics maps enums in simvision using verilog 1364
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Functional Verification blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

FSM Mnemonics Maps (Enums) in SimVision Using Verilog 1364

Comments(2)Filed under: Functional Verification, SystemVerilog, IES, debug, SimVision, Verilog

Strong FSM

The mighty FSM – you first learned it when you were a young pup at University (some of you still are!) and you use it day in and day out today.   Such a simple concept – I’m in a known state and I will either remain here or move to a new state based on inputs – but a difficult one to debug when we scale the number of states, number of inputs, and consider asynchronous events.  While we have lots of tools in our belt to verify the FSM including formal analysis and code/functional coverage, tracing the changing states through time in debug is the most commonly used.

Luckily for us, SimVision has the ability to map mnemonics to values in the waveform window to make it easier to visualize the states of the FSM.  The process to do so starts within your IEEE 1364 Verilog code where you’ll need to code parameter or localparam objects that enumerate the state.  Once you have that, you can run the TCL script created and documented by one of our genIES (SimVision and Create FSM Mnemonic maps in SimVision).  An example of how to code the FSM using localparam is shown below:

 

reg [1:0] curr_state, next_state;
localparam EMPTY = 2'b00, INUSE = 2'b01, FULL = 2'b10, ILLEGAL = 2'b11;

 

If you code your FSM using SystemVerilog enumerations, then SimVision will automatically show the correct mnemonics in the waveforms and source annotations:

 

typedef enum bit  [1:0] { EMPTY, INUSE, FULL, ILLEGAL } mystate;
mystate curr_state, next_state;

 

This handy script is provided "as is" for your use and we have other similar "plug-ins" that we will blog on in the future.  If you are thinking "it would be great to automate..." comment on this blog or send us an email at genIES@cadence.com .  Of course, if you do use this tip please comment.  Positive feedback is a magical motivator. :-)

 

=Team genIES

Comments(2)

By Terry Lyons on July 19, 2010
I tried this plugin, and it seems that I have to be running an interactive simulation to get this to work.  Is this a requirement, or can the script be modified to work during post-processing?
Thanks,
Terry Lyons

By Doug Koslow on July 21, 2010
Hi Terry,
As we discussed, you need to run the plug-in with ncsim to generate the mnemonics maps.  However, those maps can then be used in subsequent post-processing runs of SimVision.
Thanks.
- Doug

Leave a Comment


Name
E-mail (will not be published)
Comment
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.