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Is there a 1 Billion gate chip on your roadmap?

By Joseph Hupcey III on October 13, 2008Comments(0)Filed under: Functional Verification, Verification methodology , verification strategy, System Verification

Yes, I'm asking about chips that will have 1 billion -- that's billion with a "B" -- logic gates (implying they will have ~6 billion transistors).  Last year I only heard of one such chip in the works anywhere, but just this past month in the course of my travels I received word of two more such massive devices on the drawing board.  Furthermore, judging by the careful silence of some members of the "ClubT" audiences when I asked about this, I suspect there are several more such projects coming together out there.

Thus, I'm compelled to ask the gentle reader:

1 - Does your employer have a 1 billion gate SoC/ASIC in the works?

2 - Will you be contributing a block of IP that will ultimately be a part of a 1 billion gate SoC/ASIC?

3 - If (1) and/or (2) are true, are you terrified or confident about your prospects for verifying such a beast?  If "terrified", or at least "not confident", what are top 3 concerns?

[If you don't want to post your answer(s) in the comments below, feel free to contact me and I'll scrub out your name & company and share your data point as coming from "anonymous".]

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