system design is entering the era of the "globalization of
processors," in which applications find their way to the most appropriate
processors, and domain-specific languages take hold to ease design complexity and
the brave new world of electronic system design enablement that Cadence Fellow Chris Rowen
laid out to a large audience at the company's main auditorium Wednesday, Jan. 29.
It's a world that not only has moved beyond uni-processor architectures and
clocking horse races but is already stretching the boundaries of relatively new multiprocessor
approaches. (Rowen last Fall
approached the evolution from a slightly different angle; see "What Do Applications Dream About?").
Electronic System Design Enablement
this wholesale transformation of traditional design is not only performance but
system complexity and ever tighter power budgets.
the landscape, Rowen (left) said:
Designers are "starting to
wrestle with the question (of heterogeneous computing), starting from a GPU
plus CPU perspective but then expanding to cover many kinds of processing. So
we get to a place where applications find their way to the most appropriate
processor type, within a large pool of computing resources, where the cost of
the processors is low unless you turn them on. So you only turn on processors
appropriate to the task at hand."
creates opportunities not only for the likes of ARM but for Cadence, and
specifically Cadence's Tensilica products (Tensilica is the dataplane-processor company Rowen co-founded
more than 16 years ago that Cadence acquired in 2013). Tensilica and the
other technologies within the company's IP Group offer Cadence a chance at a "seat
at the table" with architects as they wrestle with design tradeoffs and the
evolution and opportunity of application-specific design, he said.
illustrate the shifting system-design sands, Rowen looked to a standard smartphone, which is, in effect, a phenomenal aggregator of many different protocols
"There's a profound
integration question at every level. How am I physically going to put all of
those different types of sensors together? How am I going to have a rational
programming environment? And how do I make it useful at the application
said a "funny thing" happens in cell phone design where some
companies put bigger and bigger processors in them "because there's a
perception that you'd rather have a phone with 8 64-bit processors at 2GHz
than something with two 1GHz 32-bit processors."
can lead to a situation where, if all these processors are running
simultaneously, the phone will overheat in a matter of seconds.
that needs to run for a significant amount of time needs to run on something
that's dramatically more energy efficient than the general-purpose
processor," Rowen added.
illustrate some of the design challenges and tradeoffs, Rowen described a
low-end image processing subsystem with no general-purpose memory. It was,
instead, a "sensor pipeline" with a sophisticated crossbar switch talking to a
high-end image processor and with perhaps a small general-purpose CPU
"doing some high-level supervision but relatively little compute."
he added, are building more specialized subsystems where people "push the envelope"
on cost and avoid the power and performance burdens that can accompany a DRAM
subsystem. "Getting off chip is becoming relatively expensive," he
cited, for example, a Cisco networking router, the nPower X1, with 336 Tensilica processors on
such rapid changes could imperil designers' sanity, if not their health.
"How do you make it
more rational? How do you get the best of both worlds? How do you get something
which from a programmer's perspective is very homogenous but from an energy
standpoint is highly optimized?"
these trends that Rowen outlined, he was asked, where does high-level synthesis
sit in future design flows?
synthesis, he replied, is excellent for raising hardware-design productivity,
because the programming languages are familiar and writing in those programming
languages gives you instant ability to emulate and simulate different ways.
he added, "there are still questions. What's the relationship between
high-level synthesis and the uncertainty of functionality?"
went on to say that processors allow designers to change the functionality of
their chip any time, whereas high-level synthesis is "not typically
conceived of as a way for the end user to change his mind."
called for methodologies that can "separate a program into the pieces that
are going to change from the pieces that aren't going to change."
about the future of programming languages, Rowen acknowledged he's not an
expert in the area but he does see "the evolution of domain-specific
languages. They offer greater productivity than, for instance, programming
closer to the metal in something like C, which is, in a sense, like Assembly
domain-specific languages combine data types, libraries of functions and
structures for coordinating activities to leverage multiple processors that are
appropriate to that domain, Rowen said.
"A lot of this will be hidden. The library will be the
thing that runs in the application-specific processor. At the highest level,
you may not... care where the top-level application runs because it's
dispatching tasks that are dominated by task dispatch to whatever the
appropriate application-specific subsystems are."
Cadence Agreed to Acquire Tensilica
-What Do Applications Dream About?
-We Need to Move "Past EDA": Tensilica
-Q&A: Tensilica Founder Chris Rowen-Perspectives
from an IP/SoC Pioneer