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Hardware/Software Modeling Opportunities and Strange Beasts

Comments(0)Filed under: Cadence, EDA tools, Brian Fuller, electronics, engineering, design automation, EDA vendors, Palladium, codesign, hardware emulation, Frank Schirrmeister, hardware-software codesign, software simulation, Incisive

SAN JOSE, Calif.—Ever seen an Eierlegende Wollmilchsau? If you have, you're sitting on an electronics design automation gold mine.

That was the question Cadence's Frank Schirrmeister posed Monday to a gathering of design engineers at ICCAD at the San Jose Hilton.

"Eierlegende Wollmilchsau" is German for an animal that's part pig, sheep, and chicken; in other words, a beast that produces wool, eggs and meat—a lot of things in one package. Whether there actually is an Eierlegende Wollmilchsau we'll get to in a minute.

Increasing complexity, one solution?

Schirrmeister's point was this "one-size-fits-all" solution is a sort-of holy grail in design engineering. This is especially so because the complexity of designs is increasing by the day, time-to-market pressures are unrelenting, and the landscape of technology providers is shifting under our feet.

Consider, for example, that semiconductor vendors provide more and more software functionality as their customers move up the value chain; SoCs can incorporate as many as 100 or more IP blocks from many different vendors. Software must be modeled as hardware is developed; we know this if we're to get a design out the door before mandatory retirement age.

That's all well and good, but who models what during the design? Schirrmeister, who is Cadence group director, product marketing, for system development, said:

"Over the last 15 years or so ... the value chain has changed completely, which has resulted in a big need of models to be exchanged. You have all these providers providing models of the hardware to the next person in the chain to build systems, and then at the end to provide an environment in which the software, like the OS..., [must] be developed in parallel, otherwise you look at a very long pole in the design flow." 

Mythical beast

The challenge is there is no Eierlegende Wollmilchsau. The software development kit may be fast, "but it basically ignores hardware. At the end (of the spectrum), I have real-time speed and I'm fully accurate, but I'm really late, and it's fairly difficult to debug," Schirrmeister argued.

In between, he added, there are different engines that all require different models. In some cases, engineers trade off speed for accuracy or vice versa.

Going hybrid

Since complexity and various design demands will never abate, solutions have to be found if we're to continue the pace of innovation. That's where the notion of verification hybrids comes in. (Examples shown in image below).

For example, Schirrmeister said, "if you combine the virtual prototyping world with the RTL implementation and create hybrids, you have the potential for good solution. That's really where the industry is going."

In that case, RTL is good for modeling complex hardware items with good hardware debug early on, on the one hand. Virtual prototyping helps engineers bring in software early on and is good for software debug, Schirrmeister said.

As you move toward the end of the design flow, you can also consider a hybrid in which you bring up real RTL with software and use emulation for gate-level simulation. That can be handy to bring together your software, hardware, and power profiles and run much longer cycles, he said. For other example of intriguing hybrid use cases, please see Richard Goering's posts "Palladium XP II—Two New Use Models for Hardware/Software Verification"  and "Designer View: New Emulation Use Models Employ Virtual Targets."

In the end, it would be amazing to come across a Eierlegende Wollmilchsau, but it's not going to happen, according to Schirrmeister.

He told the ICCAD audience:

"There is no one size fits all. Each of those representations has modeling requirements, has different advantages and disadvantages. If you can combine virtual platforms with, for example, acceleration and emulation for hardware debug, it gives you a good solution to trade speed for software development in a virtual  platform with acceleration, emulation, and hardware accuracy because you can fully look into the RTL."

 

Brian Fuller

Related stories:

Designer View: New Emulation Use Models Employ Virtual Targets

Palladium XP II—Two New Use Models for Hardware/Software Verification

 

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