Home > Community > Blogs > The Fuller View > last simple node s profound consequences
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of The Fuller View blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

"The Last Simple Node" and its Profound Consequences

Comments(2)Filed under: Cadence, EDA tools, Brian Fuller, Freescale, FinFET, communications, embedded systems, sensory swarm, design automation, finfet advantages, computer processor, electronics design, semiconductor design, IC design, 3D ICs, EDA software, sensors, computer design, Geoff Lees

SAN JOSE, Calif.—You can feel the impact of the Internet of Things (IoT) in your bones, like a relentless hum. You already know what the mobile revolution has done to society and the electronics business, much of that just in recent years.

So you can envision what IoT (or as Alberto Sangiovanni-Vincentelli calls "the swarm") will do in an even shorter period of time.

But integration, power, and cost loom as potent challenges. The conversation today surrounds what 16nm finFET and beyond will do to enable the explosion of a vast market of connected devices.

But Geoff Lees, senior vice president and general manager for microcontrollers with Freescale, sees something different—something more attainable right now.

The 28nm proposition

Lees, who keynoted Cadence's Mixed-Signal Technology Summit (Oct. 10) believes that 28nm and the sunk investment in the node in the past five years is the catalyst for juicing that market and tackling the cost, integration, and power issues without waiting for FinFETs and the expensive infrastructure buildout associated with them.

While cost for 20nm, 16nm, and 14nm FinFET nodes "is going off the scale," the same was not true for 28nm compared with the 40nm node.

Lees told the audience: 

"In our opinion, from the user side, a huge amount of the foundry space, particularly in 40 and 28 capacity built in the last five years—mostly equipment installed into later generation 300mm facilities—will be converted to 28nm. We see an enormous overhang of 28nm capacity for the next 15 years."

This means there's a perfect opportunity to take the time to develop the "richness of analog and RF technologies" and to have "useful time for integration without that node skipping to the next process node two or three years later, requiring the whole mixed-sgnal ecosystem being redone again."

"You could say that 28nm is the last simple node," he added.

Cause, effect

What will this enable? It will enable approaches (pictured in the photo) of integrated modules for edge nodes, which need robust communications protocols, bullet-proof durability, and ultra-low power consumption. 

Processing power will need to be increased exponentially, on-chip RAM needs to rise from 16-20Kbytes to 300-500Kb, the "minimum level" needed for full security, Java, network compliance, specs, profiles, and drivers, and with something up to 1MB of non-volatile memory, Lees said. Neither 40nm nor 65nm nodes is capable of this level of performance and potential integration.

"28nm is where we feel the richness of mixed-signal integration. The longevity of that node will allow us to create those products," Lees said.

The 28nm node is also where MEMS integration gets more traction. Lees showed a slide describing a 2x2x0.5mm module that was a full 32-bit MCU. It featured 40mA/MHz of dynamic power, ultra-low standby power (down to nano-amps in deep sleep), mixed-signal integration to 12 bit, and an integrated temp sensor that could be calibrated to 16 bit. The 60 percent mixed-signal device would have been at least one board 15 years ago, Lees noted.

Brian Fuller

Related stories:

- TSMC Forum: 16nm FinFET Design Challenges Met by Custom/Analog Reference Flow

- DAC 2013: Wild ride through the mind of Alberto Sangiovanni-Vincentelli

 

Comments(2)

Leave a Comment


Name
E-mail (will not be published)
Comment
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.