Cadence.com will be under maintenance from Friday, Oct. 3rd at 6pm (PST) thru Sunday, Oct 5th at 11pm (PST).
Cadence.com login, registration, community posting and commenting functionalities will be disabled.
Home > Community > Blogs > The Fuller View > 3d ics marvelous memories ee heal thyself
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of The Fuller View blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

3D-ICs; Marvelous Memories; EE, Heal Thyself (Great Reads 8-9-2013)

Comments(1)Filed under: Cadence, EE Times, EDA tool companies, EDA companies, Brian Fuller, DAC, electronics, engineers, design automation, EDA vendors, electronics design, computing, semiconductor design, circuit design, 3D ICs, EDA software, Fuller View, semiconductor ip, semiconductor ip companies, memory controller ip, flash memory ip core, memory ip core

All the news that's fit to blog about this week. 

3D-ICs: Semiconductor Hype?

It's almost always hard to tell at the beginning of an adoption cycle what's real and what's not. The optimists wax lyrical, while the cynics hammer away. That leaves the rest of us looking for the happy middle in the conversation.

Herb Reiter seems to be driving in the middle of the road right now. He was quoted in a piece by Barb Jorgenson and Ed Sperling on System-Level Design Community, saying the business model isn't ready for prime time.

But he's weighed in on EE Times, where he described how at least on the equipment and materials side, the ecosystem is progressing:

"Indeed, I believe the IC industry will bifurcate in the near future into those pursuing Moore's Law and those pursuing 'More than Moore.' Which camp companies pick will be based on several criteria -- total system cost, IC cost, development costs and their amortization over production volumes, risk of failure, time to market, and, last but not least, the technical requirements of increasingly complex solutions."

Me? I'm in the middle, too. I think 3D-IC innovation is progressing at a reasonable pace. I had a chance to listen to Professor Paul Franzon from North Carolina State a few weeks ago. His assertion is 3D-ICs are the only way scaling will continue.

If you want to follow an emerging source of 3D news and information, check out Francoise von Trapp's 3dIncites.com site. In case you're wondering, she sits firmly in the optimists' camp.

Engineer, heal thyself

electronics design engineers need to be like jazz musicians

What's the best way to design electronics? Think like a jazz musician (like Dizzy Gillespie, right). It's about leaving stuff out, not putting more stuff in. At least that's Simon Barker's take this week on EE Times.

"It has been demonstrated time and again that the average person wants a product that does one or two things very well. By giving people too much choice we induce the effect of decision paralysis-- the idea that the user has so many options, he or she effectively has none, as they don't know what the best choice is."

Brilliant. Worth a read.

Silos of innovation

Are silos good or bad? Ed Sperling takes up that question over at System Level Design, where he posits that they can be both good and bad and they ebb and flow over the decades.

Narcissism defined

Are you a narcissist? If you buy Apple products you are, according to Wired's Brett Robinson

Unclean at any speed?

Relentless government tax incentives, at least from what I can see on Bay Area roads, means more people are buying electric vehicles and electric hybrids. But are they really clean?

John Voelcker at IEEE Spectrum has an opinion.

Our Stuff

#MemCon memories

Can't run through this roll call without highlight some of the things that Richard Goering and I pulled from MemCon this week in Santa Clara.

Cadence's Martin Lund teed up the conversation by talking about memory's long and healthy future.

A lot of us walked away clearly impressed with Bob Brennan's view of the world. He keynoted Tuesday morning and described a world in which new DRAM and flash architectures are going to be needed if scaling of traditional memories will continue.

And Richard and I spent a few minutes with ChipEstimate's Sean O'Kane talking about the day and what we learned:

 Lastly, you can check out our micro-thoughts by scrolling through our live feed of the event.  

Their Stuff 

Collaborate or die

Karen Bartleson, one of our industry's social media goddesses, continues to spin out interesting interviews from Synopsys' DAC interview series. Here, she talks with Anupam Bakshi, CEO of Agnisys, who shares why he believes EDA companies must collaborate or die.

ethernet subsystems extend into automotive electronics design

Ethernet effect 

Ethernet is about to explode inside cars... in a good way. A new research report suggests upwards of 300 million Ethernet ports by 2020 and as many as 100 in highe -end models. John Day, writing for Mentor Graphics, examines the impact. 

 

Tweets of the Week

 

 

 

--Brian Fuller

Related stories:

--Moto X; Noyce Quits; China’s Chromecast (Great Reads 8-2-2013) 

Comments(1)

Leave a Comment


Name
E-mail (will not be published)
Comment
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.