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Digital Implementation Blog

Answers to Top 10 Questions on Performing ECOs in EDI System

Applying ECOs to a design can be complex, stressful and error prone so it's important to apply the right tools and flow to implement the changes successfully. EDI System provides multiple ECO flows to physically implement ECOs efficiently and accurately...  Read More »
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Five-Minute Tutorial: Set Flip-Chip Bumps as Voltage Sources in EPS/EDI Rail Analysis

When running power and rail analysis for a flip chip, we used to have to spend some time creating the voltage sources. It wasn't too terrible; usually we would output the bumps into a Cadence Encounter Digital Implementation (EDI) .io file, then use...  Read More »
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CDNLive High-Performance Track: Do You Have What it Takes to Get Your High-Performance SoC to Market?

Implementing SoCs with embedded processors at advanced nodes has become increasingly difficult. This is due to the complexity of the design functionality as well as the low power and increased performance requirements driven by a plethora of end-user...  Read More »
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Five-Minute Tutorial: Create Encounter Power System (EPS) Power-Grid Views For Standard Cells

In today's tutorial, I'm giving you a sample EPS (Encounter Power System) script that you can use to generate power-grid views for your standard cells. Power-grid views are used during rail analysis, with IR-Drop and EM (electromigration/current...  Read More »
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Quick Reference - 8 Ways to Optimize Power Using Encounter Digital Implementation (EDI) System

Everyone knows that the increasing speed and complexity of today's designs implies a significant increase in power consumption, which demands better optimization of your design for power. I am sure lot of us must be scratching our heads over how to...  Read More »
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Five-Minute Tutorial: Creating An EM Model File

One of the least-fun parts of running power and rail analysis has always been coming up with the electromigration (EM) model file. In the past, this involved cracking open the process design rule manual, finding the appropriate equations, and creating...  Read More »
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SPICE Correlation Made Easy by Encounter Timing System (ETS)

Hello, and welcome to my first blog! As an application engineer in customer support, I have received quite a few queries on how to do SPICE correlation of timing numbers. This blog is intended to help users understand the flow/methodology for doing SPICE...  Read More »
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The Case for the Tiny Testcase

I often joke with customers that, although I realize they have to work on large designs, I do my best work on designs with just 2 or 3 instances. That's because I'm often trying to replicate an issue they've observed on their design and I'm...  Read More »
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Transitioning Your LEF-Based EDI System Design Flow to OpenAccess

The trend of combining analog and digital circuits on a single chip has been growing for several years. More recently I'm seeing more and more designers improve their productivity by transitioning their designs to Open Access (OA) and taking advantage...  Read More »
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Five-Minute Tutorial: Why You Should Be Running Early DRC

Everyone knows you have to run signoff DRC before you tape out a design. Sometimes, DRC is left to exactly that moment - right before the tapeout. If major problems are found in the design at that point, the tapeout either has to be delayed, or there...  Read More »
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