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SPICE Correlation Made Easy by Encounter Timing System (ETS)

Comments(2)Filed under: Encounter Timing System, STA, static timing analysis, Spectre, ETS, signoff, ETS create_spice_deck, spice correlation, mukesh, app note, spiceHello, and welcome to my first blog!

As an application engineer in customer support, I have received quite a few queries on how to do SPICE correlation of timing numbers. This blog is intended to help users understand the flow/methodology for doing SPICE correlation of static timing analysis (STA) timing results using Encounter Timing System (ETS).

As we know, users do correlation of the critical paths in timing analysis with path simulation, using SPICE to gain the signoff confidence of their design. ETS offers built-in critical path simulation for base delay and signal integrity (SI) correlation with SPICE.

This blog describes the flow/methodology available in ETS at a higher level to perform path simulations with SPICE and correlate them with base delay timing.

SPICE Deck Generation

The ‘create_spice_deck’ command is available in ETS to generate the SPICE trace for a path.

The SPICE deck generated by ‘create_spice_deck’ includes:

- All nets in the path and their instance connections

- Standard cell gate information for the instances and their port connections - initial conditions and voltage sources

- Measure statements for slew and delay measurements

- RC parasitic network information

Various options of create_spice_deck command can be used to specify the path(s) of interest and other information required for SPICE deck.

For details on supported options to this command, visit ETS documentation

Examples for SPICE deck generation command

1) The following command without any options will generate a SPICE for worst path as seen by timing analysis


2) The following command creates a SPICE deck for specified path with predriver waveform as input PWL and side path loading of 1 stage, and includes the path of specified SPICE subcircuit and model file in SPICE deck.

create_spice_deck -report_timing {-retime path_slew_propagation -net -from_rise inst_flop1/q -though inst_buf/a -though inst_buf/y -to inst_flop2/d} -input_waveform predriver -subckt_file SPICE_subckt.sp -model_file models.sp -power {vdd vddw} -ground {vss vssw} -side_path_level 1 -outdir ETS_SPICE

3) The following command creates a SPICE deck and simulates it using the SpectreTM simulator specified.

create_spice_deck -run_path_simulation -Spectre /tools/Spectre

Running Path Simulation and Results Extraction

Path simulation can be done in two ways:

1)     Spectre™ path simulator available in ETS installation (create_spice_deck -run_path_simulation) can be used to run path simulation

2)          SPICE deck can be generated in user-specified directory, and stand-alone (outside of ETS environment) path simulation can be run using Spectre™ or any simulator that understands SPICE syntax.

Spectre™ path simulator in ETS

create_spice_deck -run_path_simulation option can be used to do on the fly path simulation in ETS.

Note: For running simulation using -run_path_simulation, it is highly recommended to specify SPICE subckt and model file using -subckt_file and -model_file options respectively. If they are not specified, design must have cdB files loaded and software will get this in-formation from cdB file. However, it is mandatory to specify subckt and model files if AAE is being used.

Besides writing a few files in the directory (specified using -outdir option) it also reports a table of timing (as shown in below example) with slew/delay/arrival column from report_timing and path simulation for correlation comparison. It will report two separate tables for launch and capture paths if report_timing –path_type full_clock is used.


Stand-alone Path Simulation


If create_spice_deck command is run without –run_path_simulation option, it will save the SPICE deck of the path (path_1_setup.sp) specified path in the specified directory (specified using –outdir option). By default, it will save the SPICE deck in ets_pathsim directory.


The user can run standalone path simulation using Spectre™ or any other simulator which understands SPICE syntax on the SPICE deck (path_1_setup.sp) saved by ETS.


Upon successful completion of path simulation, path_1_setup.measure file will be generated which can be used to extract results. Below is an example snippet of path_1_setup.measure file, which shows slew and delay measurement of two stages. 


Slew/delay statements in spice deck have ‘slew’ and ‘delay’ words to identify the slew and delay numbers for the respective stages in timing path. This file can be easily post-processed to extract simulation results. For example, the sum of all ‘delay’ stages will give path delay of the total path.



So, using any of two methods explained above you can easily correlate your design results using this ETS feature. There is an excellent appnote written on this topic which not only explains the correlation flow and methodology in detail, but at same time showcases an example SPICE deck with reasonable descriptions of various important constructs. It also cleanly covers various debugging techniques that can be used to resolve the correlation issues encountered, if any.

Click to visit the appnote Base delay SPICE correlation In ETS

Cadence Online Support website http://support.cadence.com/ is your 24/7 partner for getting help and resolving issues related to Cadence software. If you are signed up for e-mail notifications, you've likely to notice new solutions, Application Notes (Technical Papers), Videos, Manuals, etc.


Hope you find this information useful.













By Susan on March 17, 2014
This blog is very interesting to me. But it seems very old. I do not know whether the author is still active on this. I actually want to ask a question regarding spice file generation. Could you reply me when you see my message. Thanks!

By MJ Cad on March 17, 2014
Susan, thanks for showing interest in this blog. Please go ahead and post your question, we will be more than happy to answer it. - Mukesh

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