This is the last in the series of Constraint Construction blogs! Today we're going to go over DESIGN RULES and MODES OF OPERATION.
DESIGN RULES: Follow them, or else...
Often times, these rules are indeed set in the timing library. But perhaps you want sharper transitions in your design to reduce noise issues. Or maybe you want to give yourself some margin of safety with minimum capacitance. Let's go over the main design rules to live by.
- Max Fanout
- How many cells should each instance drive?
- Does the timing library set this at all or is it necessary for any specific library cells or instances in the design?
"So I cranked the max transition down to 100ps, and all my noise problems went away. Of course the design doesn't meet timing and is packed with buffers. But focusing on the good,... I got rid of the noise!"
- What is the maximum slew that each pin in the system should have? Should you have max transitions on any input or output ports?
- Should there be a limit to the load on each driving pin?
- Perhaps even on an input port or internal net?
"So you're saying there is a Best Case environment? Why would I care about that if it's so good?"
- What timing library should we use?
- Which timing corners (PVT)?
- Will you be setting the operating conditions in the constraints?
MODES OF OPERATION: There's more than one way to peel an apple.
- Is there more than one functional mode?
- Will one set of constraints handle all the modes?
- If multiple modes will be used, are all the files correctly defining each mode correctly with the use of constants?
- Are there test modes that differ significantly from the functional operation (JTAG Boundary Scan, BIST/MBIST, Shift, and Capture)?
- Have these been defined correctly as well?
Well, I hope this has been informative for everyone! The goal here is, whenever you get some constraints from someone, and you are not sure how well they are 'constructed', reference back to this and ask these simple questions and you just might catch problems early enough!
To read up some more on this topic, check out this section in the Encounter docs (please note, to access the doc requires and account and password): Setting Constraints and Performing Timing Analysis in Encounter RTL Compiler