One of the longest standing capabilities in SoC-Encounter is its ability to partition a design- the process by which a design is broken up for hierarchical implementation. I remember seeing "Big Chip? Go Hierarchical!" in marketing material for Silicon Perspective Corporation before I joined the company back in 2001 (Cadence acquired Silicon Perspective later that year), but it wasn't immediately obvious to me how the tool went about enabling hierarchical design. I hope this quick demo gives you a feel for how partitioning occurs in SoC-Encounter:
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TCL commands used in this video:
Question of the Day: Have you used SoC-Encounter's partitioning capabilities? If so, I'd like to hear about the scenarios where you've found it useful. If not, I'd also be interested in hearing about any issues blocking you from using partitioning on your designs.