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What Your Circuit Doesn't Know, Can Kill It!

Comments(0)Filed under: Virtuoso Analog Design Environment, post-extraction, device variation, IC design, IP, physical implementation, in-design, corner

Device variation has been a long-standing problem in custom design.  Over the years, our customers have made many attempts to model the behavior though parameterization, simulation model extensions, sub-circuits, and by just "guessing" as to what might happen. As the mathematical complexity of each node increases, so does the difficulty of making sure all the design possibilities are covered during the initial design phases. That's where the Virtuoso Analog Design Environment GXL can be useful. 

Created to use all of the tests and measurements developed inside Virtuoso Analog Design Environment XL, the GXL tool can help you during four distinct design phases: 

1.    Pre-design by helping the engineer retarget existing IP to new processes

2.    In-design by providing a host of sophisticated tools for developing worst case corners, yield improvement mini-flows using matching, tuning, and optimization, and high-yield analysis for discovering circuit behavior at 6-sigma.

3.    During physical implementation by allowing the designer to take "snapshots" of the partial layout to see how parasitics from routing or placement could be skewing the desired results before the design is completed and locked down.

4.    Post-extraction, verifying the design is still meeting specification even after the full hierarchical physical implementation is completed  

With Cadence's unique token licensing within the Virtuoso Analog Design Environment GXL platform, licenses never sit idle since the tokens are flexible enough to cover all of the technology or be used to run ADE XL/L cockpits when not needed for variation design. That makes the adoption of Virtuoso Analog Design GXL easy technically and easy on the budget. Over the next seven weeks, our technical experts here at Cadence will be showcasing six major capabilities contained within the tool:

a.    Creating and using worst case corners

b.    Fast yield analysis and statistical corners

c.    Mismatch variance contribution and yield contribution

d.    Design migration and retargeting

e.    Circuit tuning and optimization

f.    High yield analysis and optimization 

Check into the Custom IC Community regularly to see the latest information. And please speak with your Cadence representative to learn more about the Cadence offerings or to see a demonstration of how the technology can help you.  If you haven't looked at Virtuoso Analog Design Environment GXL in awhile, then you don't know what you are missing!  Let us show you today.

 

Steve Lewis

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