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Managing parasitics in front end
In this second of a three part webinar series on parasitic aware design, Nigel Bleasdale and Stacy Whiteman present an overview and demonstration of a front end analog IC design flow that allows you to effectively manage variability and uncertainty related to parasitics throughout the design and verification phases of design. Nigel discusses a new approach to early pre-layout exploration of parasitic effects as well as rapidly converging on post-layout verification with parasitics.
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Mike Kelly