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Analog Design vs. Automation -- Why Are They At Odds?

Comments(1)Filed under: Circuit Design, Parasitic analysis, Custom IC Design, Virtuoso, Virtuoso Analog Design Environment, IC 6.1, analog, optimization, ADE, ADE-XL, ADE-GXL, Bleasdale

Back in 2002 and 2003 there was a lot of talk about analog synthesis being the "next new thing" to close the productivity gap between analog and digital designers. Well, I hope you didn't hold your breath for this!

That promise failed mostly because analog design was still a custom design challenge, relying on innovation to provide differentiation in the final application. Standardizing analog design, or constraining the design to a fixed set of rules, never worked in reality, and innovation was squashed in the process.

Also, new designs are typically bigger, better and faster than previous generations, and a fully automated solution provides little more than derivatives of what already exists (assuming these derivatives work).

However, the challenge never went away, and over the past seven years there have been a number of different approaches to try and move analog design out of the critical path. These seem to focus mostly on offering premade IP or speeding up the core verification tools used, such as simulation, extraction and DRC/LVS.

For custom design to be truly effective and productive, these improvements are certainly needed, but a number of additional capabilities are necessary to facilitate the innovation of the designer. The answer lies in "Assisted Design," which I like to think of as analogous to adding power steering to your design flow. The designer is left in control, but the effort to move a design from point A to point B is reduced. Here, automation has a part to play and can be used to augment the flow, without replacing it.

There are a number of capabilities that fit into this space that support the "power assisted" flow, some of which you may already be using. I'll introduce them here and in future blogs I'll go into more detail. If there is a topic in this area you want covered, let me know.

Sweeps and Tuning

This is a commonly used tool that can simply vary the design, assess the impact on the design goals, and manually find the optimum solution.

Feasibility Analysis

Early in the design creation process, feasibility analysis can be used to quickly see if a design has potential before more extensive investment in simulation is made.

Sensitivity Analysis

For any design solution, it's possible to quickly explore the design's sensitivity to processing variability and environmental conditions and even the sizes of the devices used in the design.

Design Finishing

This involves pulling a design into compliance over all the required conditions, and can be quite time consuming where a large numbers of corners are concerned.

Yield Improvement

Understanding the manufacturing margin is becoming more critical as greater performance is being demanded from existing foundry processes. For some applications, high-yielding designs up to six sigma margins are required.

Parasitic Analysis

The performance of the final implementation can be quite different from the idealized view presented in a schematic. The earlier the layout effects can be assessed, the less iterations are needed between the electrical designer and layout designer.

Design Constraints (not to be confused with Design Rules)

As we know them, design rules are actually process rules and can also be sometimes called constraints. Here, I am referring to the implementation requirements that are specific to a design's configuration.

Self Documentation

Documentation is often left until the last minute, but is still required to sign off a design.

Automation in the custom design flow often leaves designers worried over loss of control or concerned over wasting a lot of time. Future blogs will explore how automation technology can be embraced in a practical flow that supports the designer's creative process and assists in meeting productivity goals.

--Nigel Bleasdale



By Rick Ross on August 18, 2010
With the ability to do floor planning and the advanced placers and routers available already in the cadence environment,  it seems that we can take a page out of the digital design to get a better picture of what the design would be like by running the analog design through a trial place/route phase and access routing information for parasitic analysis earlier in the design cycle. It may not be the final numbers, but like encounter it gives valuable information and makes the finished product better. True it may make some incorrect assumptions, but having a better picture earlier in the design process would I believe greatly reduce the design cycle.

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